float_dsp_mips.c 17 KB

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  1. /*
  2. * Copyright (c) 2012
  3. * MIPS Technologies, Inc., California.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
  14. * contributors may be used to endorse or promote products derived from
  15. * this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
  18. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20. * ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
  21. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27. * SUCH DAMAGE.
  28. *
  29. * Author: Branimir Vasic (bvasic@mips.com)
  30. * Author: Zoran Lukic (zoranl@mips.com)
  31. *
  32. * This file is part of FFmpeg.
  33. *
  34. * FFmpeg is free software; you can redistribute it and/or
  35. * modify it under the terms of the GNU Lesser General Public
  36. * License as published by the Free Software Foundation; either
  37. * version 2.1 of the License, or (at your option) any later version.
  38. *
  39. * FFmpeg is distributed in the hope that it will be useful,
  40. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  41. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  42. * Lesser General Public License for more details.
  43. *
  44. * You should have received a copy of the GNU Lesser General Public
  45. * License along with FFmpeg; if not, write to the Free Software
  46. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  47. */
  48. /**
  49. * @file
  50. * Reference: libavutil/float_dsp.c
  51. */
  52. #include "config.h"
  53. #include "libavutil/float_dsp.h"
  54. #include "libavutil/mips/asmdefs.h"
  55. #if HAVE_INLINE_ASM && HAVE_MIPSFPU
  56. #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
  57. static void vector_fmul_mips(float *dst, const float *src0, const float *src1,
  58. int len)
  59. {
  60. int i;
  61. if (len & 3) {
  62. for (i = 0; i < len; i++)
  63. dst[i] = src0[i] * src1[i];
  64. } else {
  65. float *d = (float *)dst;
  66. float *d_end = d + len;
  67. float *s0 = (float *)src0;
  68. float *s1 = (float *)src1;
  69. float src0_0, src0_1, src0_2, src0_3;
  70. float src1_0, src1_1, src1_2, src1_3;
  71. __asm__ volatile (
  72. "1: \n\t"
  73. "lwc1 %[src0_0], 0(%[s0]) \n\t"
  74. "lwc1 %[src1_0], 0(%[s1]) \n\t"
  75. "lwc1 %[src0_1], 4(%[s0]) \n\t"
  76. "lwc1 %[src1_1], 4(%[s1]) \n\t"
  77. "lwc1 %[src0_2], 8(%[s0]) \n\t"
  78. "lwc1 %[src1_2], 8(%[s1]) \n\t"
  79. "lwc1 %[src0_3], 12(%[s0]) \n\t"
  80. "lwc1 %[src1_3], 12(%[s1]) \n\t"
  81. "mul.s %[src0_0], %[src0_0], %[src1_0] \n\t"
  82. "mul.s %[src0_1], %[src0_1], %[src1_1] \n\t"
  83. "mul.s %[src0_2], %[src0_2], %[src1_2] \n\t"
  84. "mul.s %[src0_3], %[src0_3], %[src1_3] \n\t"
  85. "swc1 %[src0_0], 0(%[d]) \n\t"
  86. "swc1 %[src0_1], 4(%[d]) \n\t"
  87. "swc1 %[src0_2], 8(%[d]) \n\t"
  88. "swc1 %[src0_3], 12(%[d]) \n\t"
  89. PTR_ADDIU "%[s0], %[s0], 16 \n\t"
  90. PTR_ADDIU "%[s1], %[s1], 16 \n\t"
  91. PTR_ADDIU "%[d], %[d], 16 \n\t"
  92. "bne %[d], %[d_end], 1b \n\t"
  93. : [src0_0]"=&f"(src0_0), [src0_1]"=&f"(src0_1),
  94. [src0_2]"=&f"(src0_2), [src0_3]"=&f"(src0_3),
  95. [src1_0]"=&f"(src1_0), [src1_1]"=&f"(src1_1),
  96. [src1_2]"=&f"(src1_2), [src1_3]"=&f"(src1_3),
  97. [d]"+r"(d), [s0]"+r"(s0), [s1]"+r"(s1)
  98. : [d_end]"r"(d_end)
  99. : "memory"
  100. );
  101. }
  102. }
  103. static void vector_fmul_scalar_mips(float *dst, const float *src, float mul,
  104. int len)
  105. {
  106. float temp0, temp1, temp2, temp3;
  107. float *local_src = (float*)src;
  108. float *end = local_src + len;
  109. /* loop unrolled 4 times */
  110. __asm__ volatile(
  111. ".set push \n\t"
  112. ".set noreorder \n\t"
  113. "1: \n\t"
  114. "lwc1 %[temp0], 0(%[src]) \n\t"
  115. "lwc1 %[temp1], 4(%[src]) \n\t"
  116. "lwc1 %[temp2], 8(%[src]) \n\t"
  117. "lwc1 %[temp3], 12(%[src]) \n\t"
  118. PTR_ADDIU "%[dst], %[dst], 16 \n\t"
  119. "mul.s %[temp0], %[temp0], %[mul] \n\t"
  120. "mul.s %[temp1], %[temp1], %[mul] \n\t"
  121. "mul.s %[temp2], %[temp2], %[mul] \n\t"
  122. "mul.s %[temp3], %[temp3], %[mul] \n\t"
  123. PTR_ADDIU "%[src], %[src], 16 \n\t"
  124. "swc1 %[temp0], -16(%[dst]) \n\t"
  125. "swc1 %[temp1], -12(%[dst]) \n\t"
  126. "swc1 %[temp2], -8(%[dst]) \n\t"
  127. "bne %[src], %[end], 1b \n\t"
  128. " swc1 %[temp3], -4(%[dst]) \n\t"
  129. ".set pop \n\t"
  130. : [temp0]"=&f"(temp0), [temp1]"=&f"(temp1),
  131. [temp2]"=&f"(temp2), [temp3]"=&f"(temp3),
  132. [dst]"+r"(dst), [src]"+r"(local_src)
  133. : [end]"r"(end), [mul]"f"(mul)
  134. : "memory"
  135. );
  136. }
  137. static void vector_fmul_window_mips(float *dst, const float *src0,
  138. const float *src1, const float *win, int len)
  139. {
  140. float * dst_j, *win_j, *src0_i, *src1_j, *dst_i, *win_i;
  141. float temp, temp1, temp2, temp3;
  142. float s0, s01, s1, s11;
  143. float wi, wi1, wi2, wi3;
  144. float wj, wj1, wj2, wj3;
  145. const float * lp_end = win + len;
  146. win_i = (float *)win;
  147. win_j = (float *)(win + 2 * len -1);
  148. src1_j = (float *)(src1 + len - 1);
  149. src0_i = (float *)src0;
  150. dst_i = (float *)dst;
  151. dst_j = (float *)(dst + 2 * len -1);
  152. /* loop unrolled 4 times */
  153. __asm__ volatile (
  154. "1:"
  155. "lwc1 %[s1], 0(%[src1_j]) \n\t"
  156. "lwc1 %[wi], 0(%[win_i]) \n\t"
  157. "lwc1 %[wj], 0(%[win_j]) \n\t"
  158. "lwc1 %[s11], -4(%[src1_j]) \n\t"
  159. "lwc1 %[wi1], 4(%[win_i]) \n\t"
  160. "lwc1 %[wj1], -4(%[win_j]) \n\t"
  161. "lwc1 %[s0], 0(%[src0_i]) \n\t"
  162. "lwc1 %[s01], 4(%[src0_i]) \n\t"
  163. "mul.s %[temp], %[s1], %[wi] \n\t"
  164. "mul.s %[temp1], %[s1], %[wj] \n\t"
  165. "mul.s %[temp2], %[s11], %[wi1] \n\t"
  166. "mul.s %[temp3], %[s11], %[wj1] \n\t"
  167. "lwc1 %[s1], -8(%[src1_j]) \n\t"
  168. "lwc1 %[wi2], 8(%[win_i]) \n\t"
  169. "lwc1 %[wj2], -8(%[win_j]) \n\t"
  170. "lwc1 %[s11], -12(%[src1_j]) \n\t"
  171. "msub.s %[temp], %[temp], %[s0], %[wj] \n\t"
  172. "madd.s %[temp1], %[temp1], %[s0], %[wi] \n\t"
  173. "msub.s %[temp2], %[temp2], %[s01], %[wj1] \n\t"
  174. "madd.s %[temp3], %[temp3], %[s01], %[wi1] \n\t"
  175. "lwc1 %[wi3], 12(%[win_i]) \n\t"
  176. "lwc1 %[wj3], -12(%[win_j]) \n\t"
  177. "lwc1 %[s0], 8(%[src0_i]) \n\t"
  178. "lwc1 %[s01], 12(%[src0_i]) \n\t"
  179. PTR_ADDIU "%[src1_j],-16 \n\t"
  180. PTR_ADDIU "%[win_i],16 \n\t"
  181. PTR_ADDIU "%[win_j],-16 \n\t"
  182. PTR_ADDIU "%[src0_i],16 \n\t"
  183. "swc1 %[temp], 0(%[dst_i]) \n\t" /* dst[i] = s0*wj - s1*wi; */
  184. "swc1 %[temp1], 0(%[dst_j]) \n\t" /* dst[j] = s0*wi + s1*wj; */
  185. "swc1 %[temp2], 4(%[dst_i]) \n\t" /* dst[i+1] = s01*wj1 - s11*wi1; */
  186. "swc1 %[temp3], -4(%[dst_j]) \n\t" /* dst[j-1] = s01*wi1 + s11*wj1; */
  187. "mul.s %[temp], %[s1], %[wi2] \n\t"
  188. "mul.s %[temp1], %[s1], %[wj2] \n\t"
  189. "mul.s %[temp2], %[s11], %[wi3] \n\t"
  190. "mul.s %[temp3], %[s11], %[wj3] \n\t"
  191. "msub.s %[temp], %[temp], %[s0], %[wj2] \n\t"
  192. "madd.s %[temp1], %[temp1], %[s0], %[wi2] \n\t"
  193. "msub.s %[temp2], %[temp2], %[s01], %[wj3] \n\t"
  194. "madd.s %[temp3], %[temp3], %[s01], %[wi3] \n\t"
  195. "swc1 %[temp], 8(%[dst_i]) \n\t" /* dst[i+2] = s0*wj2 - s1*wi2; */
  196. "swc1 %[temp1], -8(%[dst_j]) \n\t" /* dst[j-2] = s0*wi2 + s1*wj2; */
  197. "swc1 %[temp2], 12(%[dst_i]) \n\t" /* dst[i+2] = s01*wj3 - s11*wi3; */
  198. "swc1 %[temp3], -12(%[dst_j]) \n\t" /* dst[j-3] = s01*wi3 + s11*wj3; */
  199. PTR_ADDIU "%[dst_i],16 \n\t"
  200. PTR_ADDIU "%[dst_j],-16 \n\t"
  201. "bne %[win_i], %[lp_end], 1b \n\t"
  202. : [temp]"=&f"(temp), [temp1]"=&f"(temp1), [temp2]"=&f"(temp2),
  203. [temp3]"=&f"(temp3), [src0_i]"+r"(src0_i), [win_i]"+r"(win_i),
  204. [src1_j]"+r"(src1_j), [win_j]"+r"(win_j), [dst_i]"+r"(dst_i),
  205. [dst_j]"+r"(dst_j), [s0] "=&f"(s0), [s01]"=&f"(s01), [s1] "=&f"(s1),
  206. [s11]"=&f"(s11), [wi] "=&f"(wi), [wj] "=&f"(wj), [wi2]"=&f"(wi2),
  207. [wj2]"=&f"(wj2), [wi3]"=&f"(wi3), [wj3]"=&f"(wj3), [wi1]"=&f"(wi1),
  208. [wj1]"=&f"(wj1)
  209. : [lp_end]"r"(lp_end)
  210. : "memory"
  211. );
  212. }
  213. static void butterflies_float_mips(float *av_restrict v1, float *av_restrict v2,
  214. int len)
  215. {
  216. float temp0, temp1, temp2, temp3, temp4;
  217. float temp5, temp6, temp7, temp8, temp9;
  218. float temp10, temp11, temp12, temp13, temp14, temp15;
  219. int pom;
  220. pom = (len >> 2)-1;
  221. /* loop unrolled 4 times */
  222. __asm__ volatile (
  223. "lwc1 %[temp0], 0(%[v1]) \n\t"
  224. "lwc1 %[temp1], 4(%[v1]) \n\t"
  225. "lwc1 %[temp2], 8(%[v1]) \n\t"
  226. "lwc1 %[temp3], 12(%[v1]) \n\t"
  227. "lwc1 %[temp4], 0(%[v2]) \n\t"
  228. "lwc1 %[temp5], 4(%[v2]) \n\t"
  229. "lwc1 %[temp6], 8(%[v2]) \n\t"
  230. "lwc1 %[temp7], 12(%[v2]) \n\t"
  231. "beq %[pom], $zero, 2f \n\t"
  232. "1: \n\t"
  233. "sub.s %[temp8], %[temp0], %[temp4] \n\t"
  234. "add.s %[temp9], %[temp0], %[temp4] \n\t"
  235. "sub.s %[temp10], %[temp1], %[temp5] \n\t"
  236. "add.s %[temp11], %[temp1], %[temp5] \n\t"
  237. "sub.s %[temp12], %[temp2], %[temp6] \n\t"
  238. "add.s %[temp13], %[temp2], %[temp6] \n\t"
  239. "sub.s %[temp14], %[temp3], %[temp7] \n\t"
  240. "add.s %[temp15], %[temp3], %[temp7] \n\t"
  241. PTR_ADDIU "%[v1], %[v1], 16 \n\t"
  242. PTR_ADDIU "%[v2], %[v2], 16 \n\t"
  243. "addiu %[pom], %[pom], -1 \n\t"
  244. "lwc1 %[temp0], 0(%[v1]) \n\t"
  245. "lwc1 %[temp1], 4(%[v1]) \n\t"
  246. "lwc1 %[temp2], 8(%[v1]) \n\t"
  247. "lwc1 %[temp3], 12(%[v1]) \n\t"
  248. "lwc1 %[temp4], 0(%[v2]) \n\t"
  249. "lwc1 %[temp5], 4(%[v2]) \n\t"
  250. "lwc1 %[temp6], 8(%[v2]) \n\t"
  251. "lwc1 %[temp7], 12(%[v2]) \n\t"
  252. "swc1 %[temp9], -16(%[v1]) \n\t"
  253. "swc1 %[temp8], -16(%[v2]) \n\t"
  254. "swc1 %[temp11], -12(%[v1]) \n\t"
  255. "swc1 %[temp10], -12(%[v2]) \n\t"
  256. "swc1 %[temp13], -8(%[v1]) \n\t"
  257. "swc1 %[temp12], -8(%[v2]) \n\t"
  258. "swc1 %[temp15], -4(%[v1]) \n\t"
  259. "swc1 %[temp14], -4(%[v2]) \n\t"
  260. "bgtz %[pom], 1b \n\t"
  261. "2: \n\t"
  262. "sub.s %[temp8], %[temp0], %[temp4] \n\t"
  263. "add.s %[temp9], %[temp0], %[temp4] \n\t"
  264. "sub.s %[temp10], %[temp1], %[temp5] \n\t"
  265. "add.s %[temp11], %[temp1], %[temp5] \n\t"
  266. "sub.s %[temp12], %[temp2], %[temp6] \n\t"
  267. "add.s %[temp13], %[temp2], %[temp6] \n\t"
  268. "sub.s %[temp14], %[temp3], %[temp7] \n\t"
  269. "add.s %[temp15], %[temp3], %[temp7] \n\t"
  270. "swc1 %[temp9], 0(%[v1]) \n\t"
  271. "swc1 %[temp8], 0(%[v2]) \n\t"
  272. "swc1 %[temp11], 4(%[v1]) \n\t"
  273. "swc1 %[temp10], 4(%[v2]) \n\t"
  274. "swc1 %[temp13], 8(%[v1]) \n\t"
  275. "swc1 %[temp12], 8(%[v2]) \n\t"
  276. "swc1 %[temp15], 12(%[v1]) \n\t"
  277. "swc1 %[temp14], 12(%[v2]) \n\t"
  278. : [v1]"+r"(v1), [v2]"+r"(v2), [pom]"+r"(pom), [temp0] "=&f" (temp0),
  279. [temp1]"=&f"(temp1), [temp2]"=&f"(temp2), [temp3]"=&f"(temp3),
  280. [temp4]"=&f"(temp4), [temp5]"=&f"(temp5), [temp6]"=&f"(temp6),
  281. [temp7]"=&f"(temp7), [temp8]"=&f"(temp8), [temp9]"=&f"(temp9),
  282. [temp10]"=&f"(temp10), [temp11]"=&f"(temp11), [temp12]"=&f"(temp12),
  283. [temp13]"=&f"(temp13), [temp14]"=&f"(temp14), [temp15]"=&f"(temp15)
  284. :
  285. : "memory"
  286. );
  287. }
  288. static void vector_fmul_reverse_mips(float *dst, const float *src0, const float *src1, int len){
  289. int i;
  290. float temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;
  291. src1 += len-1;
  292. for(i=0; i<(len>>2); i++)
  293. {
  294. /* loop unrolled 4 times */
  295. __asm__ volatile(
  296. "lwc1 %[temp0], 0(%[src0]) \n\t"
  297. "lwc1 %[temp1], 0(%[src1]) \n\t"
  298. "lwc1 %[temp2], 4(%[src0]) \n\t"
  299. "lwc1 %[temp3], -4(%[src1]) \n\t"
  300. "lwc1 %[temp4], 8(%[src0]) \n\t"
  301. "lwc1 %[temp5], -8(%[src1]) \n\t"
  302. "lwc1 %[temp6], 12(%[src0]) \n\t"
  303. "lwc1 %[temp7], -12(%[src1]) \n\t"
  304. "mul.s %[temp0], %[temp1], %[temp0] \n\t"
  305. "mul.s %[temp2], %[temp3], %[temp2] \n\t"
  306. "mul.s %[temp4], %[temp5], %[temp4] \n\t"
  307. "mul.s %[temp6], %[temp7], %[temp6] \n\t"
  308. PTR_ADDIU "%[src0], %[src0], 16 \n\t"
  309. PTR_ADDIU "%[src1], %[src1], -16 \n\t"
  310. PTR_ADDIU "%[dst], %[dst], 16 \n\t"
  311. "swc1 %[temp0], -16(%[dst]) \n\t"
  312. "swc1 %[temp2], -12(%[dst]) \n\t"
  313. "swc1 %[temp4], -8(%[dst]) \n\t"
  314. "swc1 %[temp6], -4(%[dst]) \n\t"
  315. : [dst]"+r"(dst), [src0]"+r"(src0), [src1]"+r"(src1),
  316. [temp0]"=&f"(temp0), [temp1]"=&f"(temp1),[temp2]"=&f"(temp2),
  317. [temp3]"=&f"(temp3), [temp4]"=&f"(temp4), [temp5]"=&f"(temp5),
  318. [temp6]"=&f"(temp6), [temp7]"=&f"(temp7)
  319. :
  320. : "memory"
  321. );
  322. }
  323. }
  324. #endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
  325. #endif /* HAVE_INLINE_ASM && HAVE_MIPSFPU */
  326. void ff_float_dsp_init_mips(AVFloatDSPContext *fdsp) {
  327. #if HAVE_INLINE_ASM && HAVE_MIPSFPU
  328. #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
  329. fdsp->vector_fmul = vector_fmul_mips;
  330. fdsp->vector_fmul_scalar = vector_fmul_scalar_mips;
  331. fdsp->vector_fmul_window = vector_fmul_window_mips;
  332. fdsp->butterflies_float = butterflies_float_mips;
  333. fdsp->vector_fmul_reverse = vector_fmul_reverse_mips;
  334. #endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
  335. #endif /* HAVE_INLINE_ASM && HAVE_MIPSFPU */
  336. }