Commit History

作者 SHA1 備註 提交日期
  Martin Storsjö e6e56fd7a7 configure: Add detection of assembler support for SVE/SVE2 1 年之前
  Rémi Denis-Courmont 01c5f4ad9f riscv: add Zvbb vector bit manipulation extension 6 月之前
  Rémi Denis-Courmont b3825bbe45 riscv: test for assembler support 11 月之前
  Rémi Denis-Courmont 1b6aee52a5 configure: probe RISC-V Vector extension 2 年之前
  Shiyou Yin 9a840ffa17 avutil: [loongarch] Add support for loongarch SIMD. 2 年之前
  Diego Biurrun fd502f4f5f build: Generalize yasm/nasm-related variable names 8 年之前
  Clément Bœsch 3f17751eeb Merge commit '11a9320de54759340531177c9f2b1e31e6112cc2' 7 年之前