idct_msa.c 17 KB

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  1. /*
  2. * Copyright (c) 2015 The WebM project authors. All Rights Reserved.
  3. *
  4. * Use of this source code is governed by a BSD-style license
  5. * that can be found in the LICENSE file in the root of the source
  6. * tree. An additional intellectual property rights grant can be found
  7. * in the file PATENTS. All contributing project authors may
  8. * be found in the AUTHORS file in the root of the source tree.
  9. */
  10. #include "./vp8_rtcd.h"
  11. #include "vp8/common/blockd.h"
  12. #include "vp8/common/mips/msa/vp8_macros_msa.h"
  13. static const int32_t cospi8sqrt2minus1 = 20091;
  14. static const int32_t sinpi8sqrt2 = 35468;
  15. #define TRANSPOSE_TWO_4x4_H(in0, in1, in2, in3, out0, out1, out2, out3) \
  16. { \
  17. v8i16 s4_m, s5_m, s6_m, s7_m; \
  18. \
  19. TRANSPOSE8X4_SH_SH(in0, in1, in2, in3, s4_m, s5_m, s6_m, s7_m); \
  20. ILVR_D2_SH(s6_m, s4_m, s7_m, s5_m, out0, out2); \
  21. out1 = (v8i16)__msa_ilvl_d((v2i64)s6_m, (v2i64)s4_m); \
  22. out3 = (v8i16)__msa_ilvl_d((v2i64)s7_m, (v2i64)s5_m); \
  23. }
  24. #define EXPAND_TO_H_MULTIPLY_SINPI8SQRT2_PCK_TO_W(in) \
  25. ({ \
  26. v8i16 out_m; \
  27. v8i16 zero_m = { 0 }; \
  28. v4i32 tmp1_m, tmp2_m; \
  29. v4i32 sinpi8_sqrt2_m = __msa_fill_w(sinpi8sqrt2); \
  30. \
  31. ILVRL_H2_SW(in, zero_m, tmp1_m, tmp2_m); \
  32. tmp1_m >>= 16; \
  33. tmp2_m >>= 16; \
  34. tmp1_m = (tmp1_m * sinpi8_sqrt2_m) >> 16; \
  35. tmp2_m = (tmp2_m * sinpi8_sqrt2_m) >> 16; \
  36. out_m = __msa_pckev_h((v8i16)tmp2_m, (v8i16)tmp1_m); \
  37. \
  38. out_m; \
  39. })
  40. #define VP8_IDCT_1D_H(in0, in1, in2, in3, out0, out1, out2, out3) \
  41. { \
  42. v8i16 a1_m, b1_m, c1_m, d1_m; \
  43. v8i16 c_tmp1_m, c_tmp2_m, d_tmp1_m, d_tmp2_m; \
  44. v8i16 const_cospi8sqrt2minus1_m; \
  45. \
  46. const_cospi8sqrt2minus1_m = __msa_fill_h(cospi8sqrt2minus1); \
  47. a1_m = in0 + in2; \
  48. b1_m = in0 - in2; \
  49. c_tmp1_m = EXPAND_TO_H_MULTIPLY_SINPI8SQRT2_PCK_TO_W(in1); \
  50. c_tmp2_m = __msa_mul_q_h(in3, const_cospi8sqrt2minus1_m); \
  51. c_tmp2_m = c_tmp2_m >> 1; \
  52. c_tmp2_m = in3 + c_tmp2_m; \
  53. c1_m = c_tmp1_m - c_tmp2_m; \
  54. d_tmp1_m = __msa_mul_q_h(in1, const_cospi8sqrt2minus1_m); \
  55. d_tmp1_m = d_tmp1_m >> 1; \
  56. d_tmp1_m = in1 + d_tmp1_m; \
  57. d_tmp2_m = EXPAND_TO_H_MULTIPLY_SINPI8SQRT2_PCK_TO_W(in3); \
  58. d1_m = d_tmp1_m + d_tmp2_m; \
  59. BUTTERFLY_4(a1_m, b1_m, c1_m, d1_m, out0, out1, out2, out3); \
  60. }
  61. #define VP8_IDCT_1D_W(in0, in1, in2, in3, out0, out1, out2, out3) \
  62. { \
  63. v4i32 a1_m, b1_m, c1_m, d1_m; \
  64. v4i32 c_tmp1_m, c_tmp2_m, d_tmp1_m, d_tmp2_m; \
  65. v4i32 const_cospi8sqrt2minus1_m, sinpi8_sqrt2_m; \
  66. \
  67. const_cospi8sqrt2minus1_m = __msa_fill_w(cospi8sqrt2minus1); \
  68. sinpi8_sqrt2_m = __msa_fill_w(sinpi8sqrt2); \
  69. a1_m = in0 + in2; \
  70. b1_m = in0 - in2; \
  71. c_tmp1_m = (in1 * sinpi8_sqrt2_m) >> 16; \
  72. c_tmp2_m = in3 + ((in3 * const_cospi8sqrt2minus1_m) >> 16); \
  73. c1_m = c_tmp1_m - c_tmp2_m; \
  74. d_tmp1_m = in1 + ((in1 * const_cospi8sqrt2minus1_m) >> 16); \
  75. d_tmp2_m = (in3 * sinpi8_sqrt2_m) >> 16; \
  76. d1_m = d_tmp1_m + d_tmp2_m; \
  77. BUTTERFLY_4(a1_m, b1_m, c1_m, d1_m, out0, out1, out2, out3); \
  78. }
  79. static void idct4x4_addblk_msa(int16_t *input, uint8_t *pred,
  80. int32_t pred_stride, uint8_t *dest,
  81. int32_t dest_stride) {
  82. v8i16 input0, input1;
  83. v4i32 in0, in1, in2, in3, hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3;
  84. v4i32 res0, res1, res2, res3;
  85. v16i8 zero = { 0 };
  86. v16i8 pred0, pred1, pred2, pred3, dest0, dest1, dest2, dest3;
  87. v16i8 mask = { 0, 4, 8, 12, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 };
  88. LD_SH2(input, 8, input0, input1);
  89. UNPCK_SH_SW(input0, in0, in1);
  90. UNPCK_SH_SW(input1, in2, in3);
  91. VP8_IDCT_1D_W(in0, in1, in2, in3, hz0, hz1, hz2, hz3);
  92. TRANSPOSE4x4_SW_SW(hz0, hz1, hz2, hz3, hz0, hz1, hz2, hz3);
  93. VP8_IDCT_1D_W(hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3);
  94. SRARI_W4_SW(vt0, vt1, vt2, vt3, 3);
  95. TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3);
  96. LD_SB4(pred, pred_stride, pred0, pred1, pred2, pred3);
  97. ILVR_B4_SW(zero, pred0, zero, pred1, zero, pred2, zero, pred3, res0, res1,
  98. res2, res3);
  99. ILVR_H4_SW(zero, res0, zero, res1, zero, res2, zero, res3, res0, res1, res2,
  100. res3);
  101. ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3);
  102. res0 = CLIP_SW_0_255(res0);
  103. res1 = CLIP_SW_0_255(res1);
  104. res2 = CLIP_SW_0_255(res2);
  105. res3 = CLIP_SW_0_255(res3);
  106. LD_SB4(dest, dest_stride, dest0, dest1, dest2, dest3);
  107. VSHF_B2_SB(res0, dest0, res1, dest1, mask, mask, dest0, dest1);
  108. VSHF_B2_SB(res2, dest2, res3, dest3, mask, mask, dest2, dest3);
  109. ST_SB4(dest0, dest1, dest2, dest3, dest, dest_stride);
  110. }
  111. static void idct4x4_addconst_msa(int16_t in_dc, uint8_t *pred,
  112. int32_t pred_stride, uint8_t *dest,
  113. int32_t dest_stride) {
  114. v8i16 vec;
  115. v8i16 res0, res1, res2, res3;
  116. v16i8 zero = { 0 };
  117. v16i8 pred0, pred1, pred2, pred3, dest0, dest1, dest2, dest3;
  118. v16i8 mask = { 0, 2, 4, 6, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 };
  119. vec = __msa_fill_h(in_dc);
  120. vec = __msa_srari_h(vec, 3);
  121. LD_SB4(pred, pred_stride, pred0, pred1, pred2, pred3);
  122. ILVR_B4_SH(zero, pred0, zero, pred1, zero, pred2, zero, pred3, res0, res1,
  123. res2, res3);
  124. ADD4(res0, vec, res1, vec, res2, vec, res3, vec, res0, res1, res2, res3);
  125. CLIP_SH4_0_255(res0, res1, res2, res3);
  126. LD_SB4(dest, dest_stride, dest0, dest1, dest2, dest3);
  127. VSHF_B2_SB(res0, dest0, res1, dest1, mask, mask, dest0, dest1);
  128. VSHF_B2_SB(res2, dest2, res3, dest3, mask, mask, dest2, dest3);
  129. ST_SB4(dest0, dest1, dest2, dest3, dest, dest_stride);
  130. }
  131. void vp8_short_inv_walsh4x4_msa(int16_t *input, int16_t *mb_dq_coeff) {
  132. v8i16 input0, input1;
  133. v4i32 in0, in1, in2, in3, a1, b1, c1, d1;
  134. v4i32 hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3;
  135. LD_SH2(input, 8, input0, input1);
  136. UNPCK_SH_SW(input0, in0, in1);
  137. UNPCK_SH_SW(input1, in2, in3);
  138. BUTTERFLY_4(in0, in1, in2, in3, a1, b1, c1, d1);
  139. BUTTERFLY_4(a1, d1, c1, b1, hz0, hz1, hz3, hz2);
  140. TRANSPOSE4x4_SW_SW(hz0, hz1, hz2, hz3, hz0, hz1, hz2, hz3);
  141. BUTTERFLY_4(hz0, hz1, hz2, hz3, a1, b1, c1, d1);
  142. BUTTERFLY_4(a1, d1, c1, b1, vt0, vt1, vt3, vt2);
  143. ADD4(vt0, 3, vt1, 3, vt2, 3, vt3, 3, vt0, vt1, vt2, vt3);
  144. SRA_4V(vt0, vt1, vt2, vt3, 3);
  145. mb_dq_coeff[0] = __msa_copy_s_h((v8i16)vt0, 0);
  146. mb_dq_coeff[16] = __msa_copy_s_h((v8i16)vt1, 0);
  147. mb_dq_coeff[32] = __msa_copy_s_h((v8i16)vt2, 0);
  148. mb_dq_coeff[48] = __msa_copy_s_h((v8i16)vt3, 0);
  149. mb_dq_coeff[64] = __msa_copy_s_h((v8i16)vt0, 2);
  150. mb_dq_coeff[80] = __msa_copy_s_h((v8i16)vt1, 2);
  151. mb_dq_coeff[96] = __msa_copy_s_h((v8i16)vt2, 2);
  152. mb_dq_coeff[112] = __msa_copy_s_h((v8i16)vt3, 2);
  153. mb_dq_coeff[128] = __msa_copy_s_h((v8i16)vt0, 4);
  154. mb_dq_coeff[144] = __msa_copy_s_h((v8i16)vt1, 4);
  155. mb_dq_coeff[160] = __msa_copy_s_h((v8i16)vt2, 4);
  156. mb_dq_coeff[176] = __msa_copy_s_h((v8i16)vt3, 4);
  157. mb_dq_coeff[192] = __msa_copy_s_h((v8i16)vt0, 6);
  158. mb_dq_coeff[208] = __msa_copy_s_h((v8i16)vt1, 6);
  159. mb_dq_coeff[224] = __msa_copy_s_h((v8i16)vt2, 6);
  160. mb_dq_coeff[240] = __msa_copy_s_h((v8i16)vt3, 6);
  161. }
  162. static void dequant_idct4x4_addblk_msa(int16_t *input, int16_t *dequant_input,
  163. uint8_t *dest, int32_t dest_stride) {
  164. v8i16 input0, input1, dequant_in0, dequant_in1, mul0, mul1;
  165. v8i16 in0, in1, in2, in3;
  166. v8i16 hz0_h, hz1_h, hz2_h, hz3_h;
  167. v16i8 dest0, dest1, dest2, dest3;
  168. v4i32 hz0_w, hz1_w, hz2_w, hz3_w;
  169. v4i32 vt0, vt1, vt2, vt3, res0, res1, res2, res3;
  170. v2i64 zero = { 0 };
  171. v16i8 mask = { 0, 4, 8, 12, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 };
  172. LD_SH2(input, 8, input0, input1);
  173. LD_SH2(dequant_input, 8, dequant_in0, dequant_in1);
  174. MUL2(input0, dequant_in0, input1, dequant_in1, mul0, mul1);
  175. PCKEV_D2_SH(zero, mul0, zero, mul1, in0, in2);
  176. PCKOD_D2_SH(zero, mul0, zero, mul1, in1, in3);
  177. VP8_IDCT_1D_H(in0, in1, in2, in3, hz0_h, hz1_h, hz2_h, hz3_h);
  178. PCKEV_D2_SH(hz1_h, hz0_h, hz3_h, hz2_h, mul0, mul1);
  179. UNPCK_SH_SW(mul0, hz0_w, hz1_w);
  180. UNPCK_SH_SW(mul1, hz2_w, hz3_w);
  181. TRANSPOSE4x4_SW_SW(hz0_w, hz1_w, hz2_w, hz3_w, hz0_w, hz1_w, hz2_w, hz3_w);
  182. VP8_IDCT_1D_W(hz0_w, hz1_w, hz2_w, hz3_w, vt0, vt1, vt2, vt3);
  183. SRARI_W4_SW(vt0, vt1, vt2, vt3, 3);
  184. TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3);
  185. LD_SB4(dest, dest_stride, dest0, dest1, dest2, dest3);
  186. ILVR_B4_SW(zero, dest0, zero, dest1, zero, dest2, zero, dest3, res0, res1,
  187. res2, res3);
  188. ILVR_H4_SW(zero, res0, zero, res1, zero, res2, zero, res3, res0, res1, res2,
  189. res3);
  190. ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3);
  191. res0 = CLIP_SW_0_255(res0);
  192. res1 = CLIP_SW_0_255(res1);
  193. res2 = CLIP_SW_0_255(res2);
  194. res3 = CLIP_SW_0_255(res3);
  195. VSHF_B2_SB(res0, dest0, res1, dest1, mask, mask, dest0, dest1);
  196. VSHF_B2_SB(res2, dest2, res3, dest3, mask, mask, dest2, dest3);
  197. ST_SB4(dest0, dest1, dest2, dest3, dest, dest_stride);
  198. }
  199. static void dequant_idct4x4_addblk_2x_msa(int16_t *input,
  200. int16_t *dequant_input, uint8_t *dest,
  201. int32_t dest_stride) {
  202. v16u8 dest0, dest1, dest2, dest3;
  203. v8i16 in0, in1, in2, in3;
  204. v8i16 mul0, mul1, mul2, mul3, dequant_in0, dequant_in1;
  205. v8i16 hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3;
  206. v8i16 res0, res1, res2, res3;
  207. v4i32 hz0l, hz1l, hz2l, hz3l, hz0r, hz1r, hz2r, hz3r;
  208. v4i32 vt0l, vt1l, vt2l, vt3l, vt0r, vt1r, vt2r, vt3r;
  209. v16i8 zero = { 0 };
  210. LD_SH4(input, 8, in0, in1, in2, in3);
  211. LD_SH2(dequant_input, 8, dequant_in0, dequant_in1);
  212. MUL4(in0, dequant_in0, in1, dequant_in1, in2, dequant_in0, in3, dequant_in1,
  213. mul0, mul1, mul2, mul3);
  214. PCKEV_D2_SH(mul2, mul0, mul3, mul1, in0, in2);
  215. PCKOD_D2_SH(mul2, mul0, mul3, mul1, in1, in3);
  216. VP8_IDCT_1D_H(in0, in1, in2, in3, hz0, hz1, hz2, hz3);
  217. TRANSPOSE_TWO_4x4_H(hz0, hz1, hz2, hz3, hz0, hz1, hz2, hz3);
  218. UNPCK_SH_SW(hz0, hz0r, hz0l);
  219. UNPCK_SH_SW(hz1, hz1r, hz1l);
  220. UNPCK_SH_SW(hz2, hz2r, hz2l);
  221. UNPCK_SH_SW(hz3, hz3r, hz3l);
  222. VP8_IDCT_1D_W(hz0l, hz1l, hz2l, hz3l, vt0l, vt1l, vt2l, vt3l);
  223. SRARI_W4_SW(vt0l, vt1l, vt2l, vt3l, 3);
  224. VP8_IDCT_1D_W(hz0r, hz1r, hz2r, hz3r, vt0r, vt1r, vt2r, vt3r);
  225. SRARI_W4_SW(vt0r, vt1r, vt2r, vt3r, 3);
  226. PCKEV_H4_SH(vt0l, vt0r, vt1l, vt1r, vt2l, vt2r, vt3l, vt3r, vt0, vt1, vt2,
  227. vt3);
  228. TRANSPOSE_TWO_4x4_H(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3);
  229. LD_UB4(dest, dest_stride, dest0, dest1, dest2, dest3);
  230. ILVR_B4_SH(zero, dest0, zero, dest1, zero, dest2, zero, dest3, res0, res1,
  231. res2, res3);
  232. ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3);
  233. CLIP_SH4_0_255(res0, res1, res2, res3);
  234. PCKEV_B4_SH(res0, res0, res1, res1, res2, res2, res3, res3, res0, res1, res2,
  235. res3);
  236. PCKOD_D2_UB(dest0, res0, dest1, res1, dest0, dest1);
  237. PCKOD_D2_UB(dest2, res2, dest3, res3, dest2, dest3);
  238. ST_UB4(dest0, dest1, dest2, dest3, dest, dest_stride);
  239. __asm__ __volatile__(
  240. "sw $zero, 0(%[input]) \n\t"
  241. "sw $zero, 4(%[input]) \n\t"
  242. "sw $zero, 8(%[input]) \n\t"
  243. "sw $zero, 12(%[input]) \n\t"
  244. "sw $zero, 16(%[input]) \n\t"
  245. "sw $zero, 20(%[input]) \n\t"
  246. "sw $zero, 24(%[input]) \n\t"
  247. "sw $zero, 28(%[input]) \n\t"
  248. "sw $zero, 32(%[input]) \n\t"
  249. "sw $zero, 36(%[input]) \n\t"
  250. "sw $zero, 40(%[input]) \n\t"
  251. "sw $zero, 44(%[input]) \n\t"
  252. "sw $zero, 48(%[input]) \n\t"
  253. "sw $zero, 52(%[input]) \n\t"
  254. "sw $zero, 56(%[input]) \n\t"
  255. "sw $zero, 60(%[input]) \n\t" ::
  256. [input] "r"(input));
  257. }
  258. static void dequant_idct_addconst_2x_msa(int16_t *input, int16_t *dequant_input,
  259. uint8_t *dest, int32_t dest_stride) {
  260. v8i16 input_dc0, input_dc1, vec;
  261. v16u8 dest0, dest1, dest2, dest3;
  262. v16i8 zero = { 0 };
  263. v8i16 res0, res1, res2, res3;
  264. input_dc0 = __msa_fill_h(input[0] * dequant_input[0]);
  265. input_dc1 = __msa_fill_h(input[16] * dequant_input[0]);
  266. SRARI_H2_SH(input_dc0, input_dc1, 3);
  267. vec = (v8i16)__msa_pckev_d((v2i64)input_dc1, (v2i64)input_dc0);
  268. input[0] = 0;
  269. input[16] = 0;
  270. LD_UB4(dest, dest_stride, dest0, dest1, dest2, dest3);
  271. ILVR_B4_SH(zero, dest0, zero, dest1, zero, dest2, zero, dest3, res0, res1,
  272. res2, res3);
  273. ADD4(res0, vec, res1, vec, res2, vec, res3, vec, res0, res1, res2, res3);
  274. CLIP_SH4_0_255(res0, res1, res2, res3);
  275. PCKEV_B4_SH(res0, res0, res1, res1, res2, res2, res3, res3, res0, res1, res2,
  276. res3);
  277. PCKOD_D2_UB(dest0, res0, dest1, res1, dest0, dest1);
  278. PCKOD_D2_UB(dest2, res2, dest3, res3, dest2, dest3);
  279. ST_UB4(dest0, dest1, dest2, dest3, dest, dest_stride);
  280. }
  281. void vp8_short_idct4x4llm_msa(int16_t *input, uint8_t *pred_ptr,
  282. int32_t pred_stride, uint8_t *dst_ptr,
  283. int32_t dst_stride) {
  284. idct4x4_addblk_msa(input, pred_ptr, pred_stride, dst_ptr, dst_stride);
  285. }
  286. void vp8_dc_only_idct_add_msa(int16_t input_dc, uint8_t *pred_ptr,
  287. int32_t pred_stride, uint8_t *dst_ptr,
  288. int32_t dst_stride) {
  289. idct4x4_addconst_msa(input_dc, pred_ptr, pred_stride, dst_ptr, dst_stride);
  290. }
  291. void vp8_dequantize_b_msa(BLOCKD *d, int16_t *DQC) {
  292. v8i16 dqc0, dqc1, q0, q1, dq0, dq1;
  293. LD_SH2(DQC, 8, dqc0, dqc1);
  294. LD_SH2(d->qcoeff, 8, q0, q1);
  295. MUL2(dqc0, q0, dqc1, q1, dq0, dq1);
  296. ST_SH2(dq0, dq1, d->dqcoeff, 8);
  297. }
  298. void vp8_dequant_idct_add_msa(int16_t *input, int16_t *dq, uint8_t *dest,
  299. int32_t stride) {
  300. dequant_idct4x4_addblk_msa(input, dq, dest, stride);
  301. __asm__ __volatile__(
  302. "sw $zero, 0(%[input]) \n\t"
  303. "sw $zero, 4(%[input]) \n\t"
  304. "sw $zero, 8(%[input]) \n\t"
  305. "sw $zero, 12(%[input]) \n\t"
  306. "sw $zero, 16(%[input]) \n\t"
  307. "sw $zero, 20(%[input]) \n\t"
  308. "sw $zero, 24(%[input]) \n\t"
  309. "sw $zero, 28(%[input]) \n\t"
  310. :
  311. : [input] "r"(input));
  312. }
  313. void vp8_dequant_idct_add_y_block_msa(int16_t *q, int16_t *dq, uint8_t *dst,
  314. int32_t stride, char *eobs) {
  315. int16_t *eobs_h = (int16_t *)eobs;
  316. uint8_t i;
  317. for (i = 4; i--;) {
  318. if (eobs_h[0]) {
  319. if (eobs_h[0] & 0xfefe) {
  320. dequant_idct4x4_addblk_2x_msa(q, dq, dst, stride);
  321. } else {
  322. dequant_idct_addconst_2x_msa(q, dq, dst, stride);
  323. }
  324. }
  325. q += 32;
  326. if (eobs_h[1]) {
  327. if (eobs_h[1] & 0xfefe) {
  328. dequant_idct4x4_addblk_2x_msa(q, dq, dst + 8, stride);
  329. } else {
  330. dequant_idct_addconst_2x_msa(q, dq, dst + 8, stride);
  331. }
  332. }
  333. q += 32;
  334. dst += (4 * stride);
  335. eobs_h += 2;
  336. }
  337. }
  338. void vp8_dequant_idct_add_uv_block_msa(int16_t *q, int16_t *dq, uint8_t *dstu,
  339. uint8_t *dstv, int32_t stride,
  340. char *eobs) {
  341. int16_t *eobs_h = (int16_t *)eobs;
  342. if (eobs_h[0]) {
  343. if (eobs_h[0] & 0xfefe) {
  344. dequant_idct4x4_addblk_2x_msa(q, dq, dstu, stride);
  345. } else {
  346. dequant_idct_addconst_2x_msa(q, dq, dstu, stride);
  347. }
  348. }
  349. q += 32;
  350. dstu += (stride * 4);
  351. if (eobs_h[1]) {
  352. if (eobs_h[1] & 0xfefe) {
  353. dequant_idct4x4_addblk_2x_msa(q, dq, dstu, stride);
  354. } else {
  355. dequant_idct_addconst_2x_msa(q, dq, dstu, stride);
  356. }
  357. }
  358. q += 32;
  359. if (eobs_h[2]) {
  360. if (eobs_h[2] & 0xfefe) {
  361. dequant_idct4x4_addblk_2x_msa(q, dq, dstv, stride);
  362. } else {
  363. dequant_idct_addconst_2x_msa(q, dq, dstv, stride);
  364. }
  365. }
  366. q += 32;
  367. dstv += (stride * 4);
  368. if (eobs_h[3]) {
  369. if (eobs_h[3] & 0xfefe) {
  370. dequant_idct4x4_addblk_2x_msa(q, dq, dstv, stride);
  371. } else {
  372. dequant_idct_addconst_2x_msa(q, dq, dstv, stride);
  373. }
  374. }
  375. }