idct_msa.c 16 KB

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  1. /*
  2. * Copyright (c) 2015 The WebM project authors. All Rights Reserved.
  3. *
  4. * Use of this source code is governed by a BSD-style license
  5. * that can be found in the LICENSE file in the root of the source
  6. * tree. An additional intellectual property rights grant can be found
  7. * in the file PATENTS. All contributing project authors may
  8. * be found in the AUTHORS file in the root of the source tree.
  9. */
  10. #include "./vp8_rtcd.h"
  11. #include "vp8/common/blockd.h"
  12. #include "vp8/common/mips/msa/vp8_macros_msa.h"
  13. static const int32_t cospi8sqrt2minus1 = 20091;
  14. static const int32_t sinpi8sqrt2 = 35468;
  15. #define TRANSPOSE_TWO_4x4_H(in0, in1, in2, in3, out0, out1, out2, out3) \
  16. { \
  17. v8i16 s4_m, s5_m, s6_m, s7_m; \
  18. \
  19. TRANSPOSE8X4_SH_SH(in0, in1, in2, in3, s4_m, s5_m, s6_m, s7_m); \
  20. ILVR_D2_SH(s6_m, s4_m, s7_m, s5_m, out0, out2); \
  21. out1 = (v8i16)__msa_ilvl_d((v2i64)s6_m, (v2i64)s4_m); \
  22. out3 = (v8i16)__msa_ilvl_d((v2i64)s7_m, (v2i64)s5_m); \
  23. }
  24. #define EXPAND_TO_H_MULTIPLY_SINPI8SQRT2_PCK_TO_W(in) \
  25. ({ \
  26. v8i16 out_m; \
  27. v8i16 zero_m = { 0 }; \
  28. v4i32 tmp1_m, tmp2_m; \
  29. v4i32 sinpi8_sqrt2_m = __msa_fill_w(sinpi8sqrt2); \
  30. \
  31. ILVRL_H2_SW(in, zero_m, tmp1_m, tmp2_m); \
  32. tmp1_m >>= 16; \
  33. tmp2_m >>= 16; \
  34. tmp1_m = (tmp1_m * sinpi8_sqrt2_m) >> 16; \
  35. tmp2_m = (tmp2_m * sinpi8_sqrt2_m) >> 16; \
  36. out_m = __msa_pckev_h((v8i16)tmp2_m, (v8i16)tmp1_m); \
  37. \
  38. out_m; \
  39. })
  40. #define VP8_IDCT_1D_H(in0, in1, in2, in3, out0, out1, out2, out3) \
  41. { \
  42. v8i16 a1_m, b1_m, c1_m, d1_m; \
  43. v8i16 c_tmp1_m, c_tmp2_m, d_tmp1_m, d_tmp2_m; \
  44. v8i16 const_cospi8sqrt2minus1_m; \
  45. \
  46. const_cospi8sqrt2minus1_m = __msa_fill_h(cospi8sqrt2minus1); \
  47. a1_m = in0 + in2; \
  48. b1_m = in0 - in2; \
  49. c_tmp1_m = EXPAND_TO_H_MULTIPLY_SINPI8SQRT2_PCK_TO_W(in1); \
  50. c_tmp2_m = __msa_mul_q_h(in3, const_cospi8sqrt2minus1_m); \
  51. c_tmp2_m = c_tmp2_m >> 1; \
  52. c_tmp2_m = in3 + c_tmp2_m; \
  53. c1_m = c_tmp1_m - c_tmp2_m; \
  54. d_tmp1_m = __msa_mul_q_h(in1, const_cospi8sqrt2minus1_m); \
  55. d_tmp1_m = d_tmp1_m >> 1; \
  56. d_tmp1_m = in1 + d_tmp1_m; \
  57. d_tmp2_m = EXPAND_TO_H_MULTIPLY_SINPI8SQRT2_PCK_TO_W(in3); \
  58. d1_m = d_tmp1_m + d_tmp2_m; \
  59. BUTTERFLY_4(a1_m, b1_m, c1_m, d1_m, out0, out1, out2, out3); \
  60. }
  61. #define VP8_IDCT_1D_W(in0, in1, in2, in3, out0, out1, out2, out3) \
  62. { \
  63. v4i32 a1_m, b1_m, c1_m, d1_m; \
  64. v4i32 c_tmp1_m, c_tmp2_m, d_tmp1_m, d_tmp2_m; \
  65. v4i32 const_cospi8sqrt2minus1_m, sinpi8_sqrt2_m; \
  66. \
  67. const_cospi8sqrt2minus1_m = __msa_fill_w(cospi8sqrt2minus1); \
  68. sinpi8_sqrt2_m = __msa_fill_w(sinpi8sqrt2); \
  69. a1_m = in0 + in2; \
  70. b1_m = in0 - in2; \
  71. c_tmp1_m = (in1 * sinpi8_sqrt2_m) >> 16; \
  72. c_tmp2_m = in3 + ((in3 * const_cospi8sqrt2minus1_m) >> 16); \
  73. c1_m = c_tmp1_m - c_tmp2_m; \
  74. d_tmp1_m = in1 + ((in1 * const_cospi8sqrt2minus1_m) >> 16); \
  75. d_tmp2_m = (in3 * sinpi8_sqrt2_m) >> 16; \
  76. d1_m = d_tmp1_m + d_tmp2_m; \
  77. BUTTERFLY_4(a1_m, b1_m, c1_m, d1_m, out0, out1, out2, out3); \
  78. }
  79. static void idct4x4_addblk_msa(int16_t *input, uint8_t *pred,
  80. int32_t pred_stride, uint8_t *dest,
  81. int32_t dest_stride) {
  82. v8i16 input0, input1;
  83. v4i32 in0, in1, in2, in3, hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3;
  84. v4i32 res0, res1, res2, res3;
  85. v16i8 zero = { 0 };
  86. v16i8 pred0, pred1, pred2, pred3;
  87. LD_SH2(input, 8, input0, input1);
  88. UNPCK_SH_SW(input0, in0, in1);
  89. UNPCK_SH_SW(input1, in2, in3);
  90. VP8_IDCT_1D_W(in0, in1, in2, in3, hz0, hz1, hz2, hz3);
  91. TRANSPOSE4x4_SW_SW(hz0, hz1, hz2, hz3, hz0, hz1, hz2, hz3);
  92. VP8_IDCT_1D_W(hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3);
  93. SRARI_W4_SW(vt0, vt1, vt2, vt3, 3);
  94. TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3);
  95. LD_SB4(pred, pred_stride, pred0, pred1, pred2, pred3);
  96. ILVR_B4_SW(zero, pred0, zero, pred1, zero, pred2, zero, pred3, res0, res1,
  97. res2, res3);
  98. ILVR_H4_SW(zero, res0, zero, res1, zero, res2, zero, res3, res0, res1, res2,
  99. res3);
  100. ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3);
  101. res0 = CLIP_SW_0_255(res0);
  102. res1 = CLIP_SW_0_255(res1);
  103. res2 = CLIP_SW_0_255(res2);
  104. res3 = CLIP_SW_0_255(res3);
  105. PCKEV_B2_SW(res0, res1, res2, res3, vt0, vt1);
  106. res0 = (v4i32)__msa_pckev_b((v16i8)vt0, (v16i8)vt1);
  107. ST4x4_UB(res0, res0, 3, 2, 1, 0, dest, dest_stride);
  108. }
  109. static void idct4x4_addconst_msa(int16_t in_dc, uint8_t *pred,
  110. int32_t pred_stride, uint8_t *dest,
  111. int32_t dest_stride) {
  112. v8i16 vec, res0, res1, res2, res3, dst0, dst1;
  113. v16i8 zero = { 0 };
  114. v16i8 pred0, pred1, pred2, pred3;
  115. vec = __msa_fill_h(in_dc);
  116. vec = __msa_srari_h(vec, 3);
  117. LD_SB4(pred, pred_stride, pred0, pred1, pred2, pred3);
  118. ILVR_B4_SH(zero, pred0, zero, pred1, zero, pred2, zero, pred3, res0, res1,
  119. res2, res3);
  120. ADD4(res0, vec, res1, vec, res2, vec, res3, vec, res0, res1, res2, res3);
  121. CLIP_SH4_0_255(res0, res1, res2, res3);
  122. PCKEV_B2_SH(res1, res0, res3, res2, dst0, dst1);
  123. dst0 = (v8i16)__msa_pckev_w((v4i32)dst1, (v4i32)dst0);
  124. ST4x4_UB(dst0, dst0, 0, 1, 2, 3, dest, dest_stride);
  125. }
  126. void vp8_short_inv_walsh4x4_msa(int16_t *input, int16_t *mb_dqcoeff) {
  127. v8i16 input0, input1, tmp0, tmp1, tmp2, tmp3, out0, out1;
  128. const v8i16 mask0 = { 0, 1, 2, 3, 8, 9, 10, 11 };
  129. const v8i16 mask1 = { 4, 5, 6, 7, 12, 13, 14, 15 };
  130. const v8i16 mask2 = { 0, 4, 8, 12, 1, 5, 9, 13 };
  131. const v8i16 mask3 = { 3, 7, 11, 15, 2, 6, 10, 14 };
  132. LD_SH2(input, 8, input0, input1);
  133. input1 = (v8i16)__msa_sldi_b((v16i8)input1, (v16i8)input1, 8);
  134. tmp0 = input0 + input1;
  135. tmp1 = input0 - input1;
  136. VSHF_H2_SH(tmp0, tmp1, tmp0, tmp1, mask0, mask1, tmp2, tmp3);
  137. out0 = tmp2 + tmp3;
  138. out1 = tmp2 - tmp3;
  139. VSHF_H2_SH(out0, out1, out0, out1, mask2, mask3, input0, input1);
  140. tmp0 = input0 + input1;
  141. tmp1 = input0 - input1;
  142. VSHF_H2_SH(tmp0, tmp1, tmp0, tmp1, mask0, mask1, tmp2, tmp3);
  143. tmp0 = tmp2 + tmp3;
  144. tmp1 = tmp2 - tmp3;
  145. ADD2(tmp0, 3, tmp1, 3, out0, out1);
  146. out0 >>= 3;
  147. out1 >>= 3;
  148. mb_dqcoeff[0] = __msa_copy_s_h(out0, 0);
  149. mb_dqcoeff[16] = __msa_copy_s_h(out0, 4);
  150. mb_dqcoeff[32] = __msa_copy_s_h(out1, 0);
  151. mb_dqcoeff[48] = __msa_copy_s_h(out1, 4);
  152. mb_dqcoeff[64] = __msa_copy_s_h(out0, 1);
  153. mb_dqcoeff[80] = __msa_copy_s_h(out0, 5);
  154. mb_dqcoeff[96] = __msa_copy_s_h(out1, 1);
  155. mb_dqcoeff[112] = __msa_copy_s_h(out1, 5);
  156. mb_dqcoeff[128] = __msa_copy_s_h(out0, 2);
  157. mb_dqcoeff[144] = __msa_copy_s_h(out0, 6);
  158. mb_dqcoeff[160] = __msa_copy_s_h(out1, 2);
  159. mb_dqcoeff[176] = __msa_copy_s_h(out1, 6);
  160. mb_dqcoeff[192] = __msa_copy_s_h(out0, 3);
  161. mb_dqcoeff[208] = __msa_copy_s_h(out0, 7);
  162. mb_dqcoeff[224] = __msa_copy_s_h(out1, 3);
  163. mb_dqcoeff[240] = __msa_copy_s_h(out1, 7);
  164. }
  165. static void dequant_idct4x4_addblk_msa(int16_t *input, int16_t *dequant_input,
  166. uint8_t *dest, int32_t dest_stride) {
  167. v8i16 input0, input1, dequant_in0, dequant_in1, mul0, mul1;
  168. v8i16 in0, in1, in2, in3, hz0_h, hz1_h, hz2_h, hz3_h;
  169. v16u8 dest0, dest1, dest2, dest3;
  170. v4i32 hz0_w, hz1_w, hz2_w, hz3_w, vt0, vt1, vt2, vt3, res0, res1, res2, res3;
  171. v2i64 zero = { 0 };
  172. LD_SH2(input, 8, input0, input1);
  173. LD_SH2(dequant_input, 8, dequant_in0, dequant_in1);
  174. MUL2(input0, dequant_in0, input1, dequant_in1, mul0, mul1);
  175. PCKEV_D2_SH(zero, mul0, zero, mul1, in0, in2);
  176. PCKOD_D2_SH(zero, mul0, zero, mul1, in1, in3);
  177. VP8_IDCT_1D_H(in0, in1, in2, in3, hz0_h, hz1_h, hz2_h, hz3_h);
  178. PCKEV_D2_SH(hz1_h, hz0_h, hz3_h, hz2_h, mul0, mul1);
  179. UNPCK_SH_SW(mul0, hz0_w, hz1_w);
  180. UNPCK_SH_SW(mul1, hz2_w, hz3_w);
  181. TRANSPOSE4x4_SW_SW(hz0_w, hz1_w, hz2_w, hz3_w, hz0_w, hz1_w, hz2_w, hz3_w);
  182. VP8_IDCT_1D_W(hz0_w, hz1_w, hz2_w, hz3_w, vt0, vt1, vt2, vt3);
  183. SRARI_W4_SW(vt0, vt1, vt2, vt3, 3);
  184. TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3);
  185. LD_UB4(dest, dest_stride, dest0, dest1, dest2, dest3);
  186. ILVR_B4_SW(zero, dest0, zero, dest1, zero, dest2, zero, dest3, res0, res1,
  187. res2, res3);
  188. ILVR_H4_SW(zero, res0, zero, res1, zero, res2, zero, res3, res0, res1, res2,
  189. res3);
  190. ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3);
  191. res0 = CLIP_SW_0_255(res0);
  192. res1 = CLIP_SW_0_255(res1);
  193. res2 = CLIP_SW_0_255(res2);
  194. res3 = CLIP_SW_0_255(res3);
  195. PCKEV_B2_SW(res0, res1, res2, res3, vt0, vt1);
  196. res0 = (v4i32)__msa_pckev_b((v16i8)vt0, (v16i8)vt1);
  197. ST4x4_UB(res0, res0, 3, 2, 1, 0, dest, dest_stride);
  198. }
  199. static void dequant_idct4x4_addblk_2x_msa(int16_t *input,
  200. int16_t *dequant_input, uint8_t *dest,
  201. int32_t dest_stride) {
  202. v16u8 dest0, dest1, dest2, dest3;
  203. v8i16 in0, in1, in2, in3, mul0, mul1, mul2, mul3, dequant_in0, dequant_in1;
  204. v8i16 hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3, res0, res1, res2, res3;
  205. v4i32 hz0l, hz1l, hz2l, hz3l, hz0r, hz1r, hz2r, hz3r;
  206. v4i32 vt0l, vt1l, vt2l, vt3l, vt0r, vt1r, vt2r, vt3r;
  207. v16i8 zero = { 0 };
  208. LD_SH4(input, 8, in0, in1, in2, in3);
  209. LD_SH2(dequant_input, 8, dequant_in0, dequant_in1);
  210. MUL4(in0, dequant_in0, in1, dequant_in1, in2, dequant_in0, in3, dequant_in1,
  211. mul0, mul1, mul2, mul3);
  212. PCKEV_D2_SH(mul2, mul0, mul3, mul1, in0, in2);
  213. PCKOD_D2_SH(mul2, mul0, mul3, mul1, in1, in3);
  214. VP8_IDCT_1D_H(in0, in1, in2, in3, hz0, hz1, hz2, hz3);
  215. TRANSPOSE_TWO_4x4_H(hz0, hz1, hz2, hz3, hz0, hz1, hz2, hz3);
  216. UNPCK_SH_SW(hz0, hz0r, hz0l);
  217. UNPCK_SH_SW(hz1, hz1r, hz1l);
  218. UNPCK_SH_SW(hz2, hz2r, hz2l);
  219. UNPCK_SH_SW(hz3, hz3r, hz3l);
  220. VP8_IDCT_1D_W(hz0l, hz1l, hz2l, hz3l, vt0l, vt1l, vt2l, vt3l);
  221. SRARI_W4_SW(vt0l, vt1l, vt2l, vt3l, 3);
  222. VP8_IDCT_1D_W(hz0r, hz1r, hz2r, hz3r, vt0r, vt1r, vt2r, vt3r);
  223. SRARI_W4_SW(vt0r, vt1r, vt2r, vt3r, 3);
  224. PCKEV_H4_SH(vt0l, vt0r, vt1l, vt1r, vt2l, vt2r, vt3l, vt3r, vt0, vt1, vt2,
  225. vt3);
  226. TRANSPOSE_TWO_4x4_H(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3);
  227. LD_UB4(dest, dest_stride, dest0, dest1, dest2, dest3);
  228. ILVR_B4_SH(zero, dest0, zero, dest1, zero, dest2, zero, dest3, res0, res1,
  229. res2, res3);
  230. ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3);
  231. CLIP_SH4_0_255(res0, res1, res2, res3);
  232. PCKEV_B2_SW(res1, res0, res3, res2, vt0l, vt1l);
  233. ST8x4_UB(vt0l, vt1l, dest, dest_stride);
  234. __asm__ __volatile__(
  235. "sw $zero, 0(%[input]) \n\t"
  236. "sw $zero, 4(%[input]) \n\t"
  237. "sw $zero, 8(%[input]) \n\t"
  238. "sw $zero, 12(%[input]) \n\t"
  239. "sw $zero, 16(%[input]) \n\t"
  240. "sw $zero, 20(%[input]) \n\t"
  241. "sw $zero, 24(%[input]) \n\t"
  242. "sw $zero, 28(%[input]) \n\t"
  243. "sw $zero, 32(%[input]) \n\t"
  244. "sw $zero, 36(%[input]) \n\t"
  245. "sw $zero, 40(%[input]) \n\t"
  246. "sw $zero, 44(%[input]) \n\t"
  247. "sw $zero, 48(%[input]) \n\t"
  248. "sw $zero, 52(%[input]) \n\t"
  249. "sw $zero, 56(%[input]) \n\t"
  250. "sw $zero, 60(%[input]) \n\t" ::
  251. [input] "r"(input));
  252. }
  253. static void dequant_idct_addconst_2x_msa(int16_t *input, int16_t *dequant_input,
  254. uint8_t *dest, int32_t dest_stride) {
  255. v8i16 input_dc0, input_dc1, vec, res0, res1, res2, res3;
  256. v16u8 dest0, dest1, dest2, dest3;
  257. v16i8 zero = { 0 };
  258. input_dc0 = __msa_fill_h(input[0] * dequant_input[0]);
  259. input_dc1 = __msa_fill_h(input[16] * dequant_input[0]);
  260. SRARI_H2_SH(input_dc0, input_dc1, 3);
  261. vec = (v8i16)__msa_pckev_d((v2i64)input_dc1, (v2i64)input_dc0);
  262. input[0] = 0;
  263. input[16] = 0;
  264. LD_UB4(dest, dest_stride, dest0, dest1, dest2, dest3);
  265. ILVR_B4_SH(zero, dest0, zero, dest1, zero, dest2, zero, dest3, res0, res1,
  266. res2, res3);
  267. ADD4(res0, vec, res1, vec, res2, vec, res3, vec, res0, res1, res2, res3);
  268. CLIP_SH4_0_255(res0, res1, res2, res3);
  269. PCKEV_B2_SH(res1, res0, res3, res2, res0, res1);
  270. ST8x4_UB(res0, res1, dest, dest_stride);
  271. }
  272. void vp8_short_idct4x4llm_msa(int16_t *input, uint8_t *pred_ptr,
  273. int32_t pred_stride, uint8_t *dst_ptr,
  274. int32_t dst_stride) {
  275. idct4x4_addblk_msa(input, pred_ptr, pred_stride, dst_ptr, dst_stride);
  276. }
  277. void vp8_dc_only_idct_add_msa(int16_t input_dc, uint8_t *pred_ptr,
  278. int32_t pred_stride, uint8_t *dst_ptr,
  279. int32_t dst_stride) {
  280. idct4x4_addconst_msa(input_dc, pred_ptr, pred_stride, dst_ptr, dst_stride);
  281. }
  282. void vp8_dequantize_b_msa(BLOCKD *d, int16_t *DQC) {
  283. v8i16 dqc0, dqc1, q0, q1, dq0, dq1;
  284. LD_SH2(DQC, 8, dqc0, dqc1);
  285. LD_SH2(d->qcoeff, 8, q0, q1);
  286. MUL2(dqc0, q0, dqc1, q1, dq0, dq1);
  287. ST_SH2(dq0, dq1, d->dqcoeff, 8);
  288. }
  289. void vp8_dequant_idct_add_msa(int16_t *input, int16_t *dq, uint8_t *dest,
  290. int32_t stride) {
  291. dequant_idct4x4_addblk_msa(input, dq, dest, stride);
  292. __asm__ __volatile__(
  293. "sw $zero, 0(%[input]) \n\t"
  294. "sw $zero, 4(%[input]) \n\t"
  295. "sw $zero, 8(%[input]) \n\t"
  296. "sw $zero, 12(%[input]) \n\t"
  297. "sw $zero, 16(%[input]) \n\t"
  298. "sw $zero, 20(%[input]) \n\t"
  299. "sw $zero, 24(%[input]) \n\t"
  300. "sw $zero, 28(%[input]) \n\t"
  301. :
  302. : [input] "r"(input));
  303. }
  304. void vp8_dequant_idct_add_y_block_msa(int16_t *q, int16_t *dq, uint8_t *dst,
  305. int32_t stride, char *eobs) {
  306. int16_t *eobs_h = (int16_t *)eobs;
  307. uint8_t i;
  308. for (i = 4; i--;) {
  309. if (eobs_h[0]) {
  310. if (eobs_h[0] & 0xfefe) {
  311. dequant_idct4x4_addblk_2x_msa(q, dq, dst, stride);
  312. } else {
  313. dequant_idct_addconst_2x_msa(q, dq, dst, stride);
  314. }
  315. }
  316. q += 32;
  317. if (eobs_h[1]) {
  318. if (eobs_h[1] & 0xfefe) {
  319. dequant_idct4x4_addblk_2x_msa(q, dq, dst + 8, stride);
  320. } else {
  321. dequant_idct_addconst_2x_msa(q, dq, dst + 8, stride);
  322. }
  323. }
  324. q += 32;
  325. dst += (4 * stride);
  326. eobs_h += 2;
  327. }
  328. }
  329. void vp8_dequant_idct_add_uv_block_msa(int16_t *q, int16_t *dq, uint8_t *dst_u,
  330. uint8_t *dst_v, int32_t stride,
  331. char *eobs) {
  332. int16_t *eobs_h = (int16_t *)eobs;
  333. if (eobs_h[0]) {
  334. if (eobs_h[0] & 0xfefe) {
  335. dequant_idct4x4_addblk_2x_msa(q, dq, dst_u, stride);
  336. } else {
  337. dequant_idct_addconst_2x_msa(q, dq, dst_u, stride);
  338. }
  339. }
  340. q += 32;
  341. dst_u += (stride * 4);
  342. if (eobs_h[1]) {
  343. if (eobs_h[1] & 0xfefe) {
  344. dequant_idct4x4_addblk_2x_msa(q, dq, dst_u, stride);
  345. } else {
  346. dequant_idct_addconst_2x_msa(q, dq, dst_u, stride);
  347. }
  348. }
  349. q += 32;
  350. if (eobs_h[2]) {
  351. if (eobs_h[2] & 0xfefe) {
  352. dequant_idct4x4_addblk_2x_msa(q, dq, dst_v, stride);
  353. } else {
  354. dequant_idct_addconst_2x_msa(q, dq, dst_v, stride);
  355. }
  356. }
  357. q += 32;
  358. dst_v += (stride * 4);
  359. if (eobs_h[3]) {
  360. if (eobs_h[3] & 0xfefe) {
  361. dequant_idct4x4_addblk_2x_msa(q, dq, dst_v, stride);
  362. } else {
  363. dequant_idct_addconst_2x_msa(q, dq, dst_v, stride);
  364. }
  365. }
  366. }