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armv4cpuid.pl 5.3 KB

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  1. #! /usr/bin/env perl
  2. # Copyright 2015-2020 The OpenSSL Project Authors. All Rights Reserved.
  3. #
  4. # Licensed under the OpenSSL license (the "License"). You may not use
  5. # this file except in compliance with the License. You can obtain a copy
  6. # in the file LICENSE in the source distribution or at
  7. # https://www.openssl.org/source/license.html
  8. $flavour = shift;
  9. $output = shift;
  10. $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
  11. ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
  12. ( $xlate="${dir}perlasm/arm-xlate.pl" and -f $xlate) or
  13. die "can't locate arm-xlate.pl";
  14. open OUT,"| \"$^X\" $xlate $flavour $output";
  15. *STDOUT=*OUT;
  16. $code.=<<___;
  17. #include "arm_arch.h"
  18. .text
  19. #if defined(__thumb2__) && !defined(__APPLE__)
  20. .syntax unified
  21. .thumb
  22. #else
  23. .code 32
  24. #undef __thumb2__
  25. #endif
  26. .align 5
  27. .global OPENSSL_atomic_add
  28. .type OPENSSL_atomic_add,%function
  29. OPENSSL_atomic_add:
  30. #if __ARM_ARCH__>=6
  31. .Ladd: ldrex r2,[r0]
  32. add r3,r2,r1
  33. strex r2,r3,[r0]
  34. cmp r2,#0
  35. bne .Ladd
  36. mov r0,r3
  37. bx lr
  38. #else
  39. stmdb sp!,{r4-r6,lr}
  40. ldr r2,.Lspinlock
  41. adr r3,.Lspinlock
  42. mov r4,r0
  43. mov r5,r1
  44. add r6,r3,r2 @ &spinlock
  45. b .+8
  46. .Lspin: bl sched_yield
  47. mov r0,#-1
  48. swp r0,r0,[r6]
  49. cmp r0,#0
  50. bne .Lspin
  51. ldr r2,[r4]
  52. add r2,r2,r5
  53. str r2,[r4]
  54. str r0,[r6] @ release spinlock
  55. ldmia sp!,{r4-r6,lr}
  56. tst lr,#1
  57. moveq pc,lr
  58. .word 0xe12fff1e @ bx lr
  59. #endif
  60. .size OPENSSL_atomic_add,.-OPENSSL_atomic_add
  61. .global OPENSSL_cleanse
  62. .type OPENSSL_cleanse,%function
  63. OPENSSL_cleanse:
  64. eor ip,ip,ip
  65. cmp r1,#7
  66. #ifdef __thumb2__
  67. itt hs
  68. #endif
  69. subhs r1,r1,#4
  70. bhs .Lot
  71. cmp r1,#0
  72. beq .Lcleanse_done
  73. .Little:
  74. strb ip,[r0],#1
  75. subs r1,r1,#1
  76. bhi .Little
  77. b .Lcleanse_done
  78. .Lot: tst r0,#3
  79. beq .Laligned
  80. strb ip,[r0],#1
  81. sub r1,r1,#1
  82. b .Lot
  83. .Laligned:
  84. str ip,[r0],#4
  85. subs r1,r1,#4
  86. bhs .Laligned
  87. adds r1,r1,#4
  88. bne .Little
  89. .Lcleanse_done:
  90. #if __ARM_ARCH__>=5
  91. bx lr
  92. #else
  93. tst lr,#1
  94. moveq pc,lr
  95. .word 0xe12fff1e @ bx lr
  96. #endif
  97. .size OPENSSL_cleanse,.-OPENSSL_cleanse
  98. .global CRYPTO_memcmp
  99. .type CRYPTO_memcmp,%function
  100. .align 4
  101. CRYPTO_memcmp:
  102. eor ip,ip,ip
  103. cmp r2,#0
  104. beq .Lno_data
  105. stmdb sp!,{r4,r5}
  106. .Loop_cmp:
  107. ldrb r4,[r0],#1
  108. ldrb r5,[r1],#1
  109. eor r4,r4,r5
  110. orr ip,ip,r4
  111. subs r2,r2,#1
  112. bne .Loop_cmp
  113. ldmia sp!,{r4,r5}
  114. .Lno_data:
  115. rsb r0,ip,#0
  116. mov r0,r0,lsr#31
  117. #if __ARM_ARCH__>=5
  118. bx lr
  119. #else
  120. tst lr,#1
  121. moveq pc,lr
  122. .word 0xe12fff1e @ bx lr
  123. #endif
  124. .size CRYPTO_memcmp,.-CRYPTO_memcmp
  125. #if __ARM_MAX_ARCH__>=7
  126. .arch armv7-a
  127. .fpu neon
  128. .align 5
  129. .global _armv7_neon_probe
  130. .type _armv7_neon_probe,%function
  131. _armv7_neon_probe:
  132. vorr q0,q0,q0
  133. bx lr
  134. .size _armv7_neon_probe,.-_armv7_neon_probe
  135. .global _armv7_tick
  136. .type _armv7_tick,%function
  137. _armv7_tick:
  138. #ifdef __APPLE__
  139. mrrc p15,0,r0,r1,c14 @ CNTPCT
  140. #else
  141. mrrc p15,1,r0,r1,c14 @ CNTVCT
  142. #endif
  143. bx lr
  144. .size _armv7_tick,.-_armv7_tick
  145. .global _armv8_aes_probe
  146. .type _armv8_aes_probe,%function
  147. _armv8_aes_probe:
  148. #if defined(__thumb2__) && !defined(__APPLE__)
  149. .byte 0xb0,0xff,0x00,0x03 @ aese.8 q0,q0
  150. #else
  151. .byte 0x00,0x03,0xb0,0xf3 @ aese.8 q0,q0
  152. #endif
  153. bx lr
  154. .size _armv8_aes_probe,.-_armv8_aes_probe
  155. .global _armv8_sha1_probe
  156. .type _armv8_sha1_probe,%function
  157. _armv8_sha1_probe:
  158. #if defined(__thumb2__) && !defined(__APPLE__)
  159. .byte 0x00,0xef,0x40,0x0c @ sha1c.32 q0,q0,q0
  160. #else
  161. .byte 0x40,0x0c,0x00,0xf2 @ sha1c.32 q0,q0,q0
  162. #endif
  163. bx lr
  164. .size _armv8_sha1_probe,.-_armv8_sha1_probe
  165. .global _armv8_sha256_probe
  166. .type _armv8_sha256_probe,%function
  167. _armv8_sha256_probe:
  168. #if defined(__thumb2__) && !defined(__APPLE__)
  169. .byte 0x00,0xff,0x40,0x0c @ sha256h.32 q0,q0,q0
  170. #else
  171. .byte 0x40,0x0c,0x00,0xf3 @ sha256h.32 q0,q0,q0
  172. #endif
  173. bx lr
  174. .size _armv8_sha256_probe,.-_armv8_sha256_probe
  175. .global _armv8_pmull_probe
  176. .type _armv8_pmull_probe,%function
  177. _armv8_pmull_probe:
  178. #if defined(__thumb2__) && !defined(__APPLE__)
  179. .byte 0xa0,0xef,0x00,0x0e @ vmull.p64 q0,d0,d0
  180. #else
  181. .byte 0x00,0x0e,0xa0,0xf2 @ vmull.p64 q0,d0,d0
  182. #endif
  183. bx lr
  184. .size _armv8_pmull_probe,.-_armv8_pmull_probe
  185. #endif
  186. .global OPENSSL_wipe_cpu
  187. .type OPENSSL_wipe_cpu,%function
  188. OPENSSL_wipe_cpu:
  189. #if __ARM_MAX_ARCH__>=7
  190. ldr r0,.LOPENSSL_armcap
  191. adr r1,.LOPENSSL_armcap
  192. ldr r0,[r1,r0]
  193. #ifdef __APPLE__
  194. ldr r0,[r0]
  195. #endif
  196. #endif
  197. eor r2,r2,r2
  198. eor r3,r3,r3
  199. eor ip,ip,ip
  200. #if __ARM_MAX_ARCH__>=7
  201. tst r0,#1
  202. beq .Lwipe_done
  203. veor q0, q0, q0
  204. veor q1, q1, q1
  205. veor q2, q2, q2
  206. veor q3, q3, q3
  207. veor q8, q8, q8
  208. veor q9, q9, q9
  209. veor q10, q10, q10
  210. veor q11, q11, q11
  211. veor q12, q12, q12
  212. veor q13, q13, q13
  213. veor q14, q14, q14
  214. veor q15, q15, q15
  215. .Lwipe_done:
  216. #endif
  217. mov r0,sp
  218. #if __ARM_ARCH__>=5
  219. bx lr
  220. #else
  221. tst lr,#1
  222. moveq pc,lr
  223. .word 0xe12fff1e @ bx lr
  224. #endif
  225. .size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
  226. .global OPENSSL_instrument_bus
  227. .type OPENSSL_instrument_bus,%function
  228. OPENSSL_instrument_bus:
  229. eor r0,r0,r0
  230. #if __ARM_ARCH__>=5
  231. bx lr
  232. #else
  233. tst lr,#1
  234. moveq pc,lr
  235. .word 0xe12fff1e @ bx lr
  236. #endif
  237. .size OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
  238. .global OPENSSL_instrument_bus2
  239. .type OPENSSL_instrument_bus2,%function
  240. OPENSSL_instrument_bus2:
  241. eor r0,r0,r0
  242. #if __ARM_ARCH__>=5
  243. bx lr
  244. #else
  245. tst lr,#1
  246. moveq pc,lr
  247. .word 0xe12fff1e @ bx lr
  248. #endif
  249. .size OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
  250. .align 5
  251. #if __ARM_MAX_ARCH__>=7
  252. .LOPENSSL_armcap:
  253. .word OPENSSL_armcap_P-.
  254. #endif
  255. #if __ARM_ARCH__>=6
  256. .align 5
  257. #else
  258. .Lspinlock:
  259. .word atomic_add_spinlock-.Lspinlock
  260. .align 5
  261. .data
  262. .align 2
  263. atomic_add_spinlock:
  264. .word 0
  265. #endif
  266. .comm OPENSSL_armcap_P,4,4
  267. .hidden OPENSSL_armcap_P
  268. ___
  269. print $code;
  270. close STDOUT or die "error closing STDOUT: $!";