cpu_id.cc 8.8 KB

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  1. /*
  2. * Copyright 2011 The LibYuv Project Authors. All rights reserved.
  3. *
  4. * Use of this source code is governed by a BSD-style license
  5. * that can be found in the LICENSE file in the root of the source
  6. * tree. An additional intellectual property rights grant can be found
  7. * in the file PATENTS. All contributing project authors may
  8. * be found in the AUTHORS file in the root of the source tree.
  9. */
  10. #include "libyuv/cpu_id.h"
  11. #if defined(_MSC_VER)
  12. #include <intrin.h> // For __cpuidex()
  13. #endif
  14. #if !defined(__pnacl__) && !defined(__CLR_VER) && \
  15. !defined(__native_client__) && (defined(_M_IX86) || defined(_M_X64)) && \
  16. defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219)
  17. #include <immintrin.h> // For _xgetbv()
  18. #endif
  19. // For ArmCpuCaps() but unittested on all platforms
  20. #include <stdio.h>
  21. #include <string.h>
  22. #ifdef __cplusplus
  23. namespace libyuv {
  24. extern "C" {
  25. #endif
  26. // For functions that use the stack and have runtime checks for overflow,
  27. // use SAFEBUFFERS to avoid additional check.
  28. #if defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219) && \
  29. !defined(__clang__)
  30. #define SAFEBUFFERS __declspec(safebuffers)
  31. #else
  32. #define SAFEBUFFERS
  33. #endif
  34. // cpu_info_ variable for SIMD instruction sets detected.
  35. LIBYUV_API int cpu_info_ = 0;
  36. // TODO(fbarchard): Consider using int for cpuid so casting is not needed.
  37. // Low level cpuid for X86.
  38. #if (defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || \
  39. defined(__x86_64__)) && \
  40. !defined(__pnacl__) && !defined(__CLR_VER)
  41. LIBYUV_API
  42. void CpuId(int info_eax, int info_ecx, int* cpu_info) {
  43. #if defined(_MSC_VER)
  44. // Visual C version uses intrinsic or inline x86 assembly.
  45. #if defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219)
  46. __cpuidex(cpu_info, info_eax, info_ecx);
  47. #elif defined(_M_IX86)
  48. __asm {
  49. mov eax, info_eax
  50. mov ecx, info_ecx
  51. mov edi, cpu_info
  52. cpuid
  53. mov [edi], eax
  54. mov [edi + 4], ebx
  55. mov [edi + 8], ecx
  56. mov [edi + 12], edx
  57. }
  58. #else // Visual C but not x86
  59. if (info_ecx == 0) {
  60. __cpuid(cpu_info, info_eax);
  61. } else {
  62. cpu_info[3] = cpu_info[2] = cpu_info[1] = cpu_info[0] = 0u;
  63. }
  64. #endif
  65. // GCC version uses inline x86 assembly.
  66. #else // defined(_MSC_VER)
  67. int info_ebx, info_edx;
  68. asm volatile(
  69. #if defined(__i386__) && defined(__PIC__)
  70. // Preserve ebx for fpic 32 bit.
  71. "mov %%ebx, %%edi \n"
  72. "cpuid \n"
  73. "xchg %%edi, %%ebx \n"
  74. : "=D"(info_ebx),
  75. #else
  76. "cpuid \n"
  77. : "=b"(info_ebx),
  78. #endif // defined( __i386__) && defined(__PIC__)
  79. "+a"(info_eax), "+c"(info_ecx), "=d"(info_edx));
  80. cpu_info[0] = info_eax;
  81. cpu_info[1] = info_ebx;
  82. cpu_info[2] = info_ecx;
  83. cpu_info[3] = info_edx;
  84. #endif // defined(_MSC_VER)
  85. }
  86. #else // (defined(_M_IX86) || defined(_M_X64) ...
  87. LIBYUV_API
  88. void CpuId(int eax, int ecx, int* cpu_info) {
  89. (void)eax;
  90. (void)ecx;
  91. cpu_info[0] = cpu_info[1] = cpu_info[2] = cpu_info[3] = 0;
  92. }
  93. #endif
  94. // For VS2010 and earlier emit can be used:
  95. // _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0 // For VS2010 and earlier.
  96. // __asm {
  97. // xor ecx, ecx // xcr 0
  98. // xgetbv
  99. // mov xcr0, eax
  100. // }
  101. // For VS2013 and earlier 32 bit, the _xgetbv(0) optimizer produces bad code.
  102. // https://code.google.com/p/libyuv/issues/detail?id=529
  103. #if defined(_M_IX86) && (_MSC_VER < 1900)
  104. #pragma optimize("g", off)
  105. #endif
  106. #if (defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || \
  107. defined(__x86_64__)) && \
  108. !defined(__pnacl__) && !defined(__CLR_VER) && !defined(__native_client__)
  109. // X86 CPUs have xgetbv to detect OS saves high parts of ymm registers.
  110. int GetXCR0() {
  111. int xcr0 = 0;
  112. #if defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219)
  113. xcr0 = (int)_xgetbv(0); // VS2010 SP1 required. NOLINT
  114. #elif defined(__i386__) || defined(__x86_64__)
  115. asm(".byte 0x0f, 0x01, 0xd0" : "=a"(xcr0) : "c"(0) : "%edx");
  116. #endif // defined(__i386__) || defined(__x86_64__)
  117. return xcr0;
  118. }
  119. #else
  120. // xgetbv unavailable to query for OSSave support. Return 0.
  121. #define GetXCR0() 0
  122. #endif // defined(_M_IX86) || defined(_M_X64) ..
  123. // Return optimization to previous setting.
  124. #if defined(_M_IX86) && (_MSC_VER < 1900)
  125. #pragma optimize("g", on)
  126. #endif
  127. // based on libvpx arm_cpudetect.c
  128. // For Arm, but public to allow testing on any CPU
  129. LIBYUV_API SAFEBUFFERS int ArmCpuCaps(const char* cpuinfo_name) {
  130. char cpuinfo_line[512];
  131. FILE* f = fopen(cpuinfo_name, "r");
  132. if (!f) {
  133. // Assume Neon if /proc/cpuinfo is unavailable.
  134. // This will occur for Chrome sandbox for Pepper or Render process.
  135. return kCpuHasNEON;
  136. }
  137. while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
  138. if (memcmp(cpuinfo_line, "Features", 8) == 0) {
  139. char* p = strstr(cpuinfo_line, " neon");
  140. if (p && (p[5] == ' ' || p[5] == '\n')) {
  141. fclose(f);
  142. return kCpuHasNEON;
  143. }
  144. // aarch64 uses asimd for Neon.
  145. p = strstr(cpuinfo_line, " asimd");
  146. if (p) {
  147. fclose(f);
  148. return kCpuHasNEON;
  149. }
  150. }
  151. }
  152. fclose(f);
  153. return 0;
  154. }
  155. // TODO(fbarchard): Consider read_msa_ir().
  156. // TODO(fbarchard): Add unittest.
  157. LIBYUV_API SAFEBUFFERS int MipsCpuCaps(const char* cpuinfo_name,
  158. const char ase[]) {
  159. char cpuinfo_line[512];
  160. FILE* f = fopen(cpuinfo_name, "r");
  161. if (!f) {
  162. // ase enabled if /proc/cpuinfo is unavailable.
  163. if (strcmp(ase, " msa") == 0) {
  164. return kCpuHasMSA;
  165. }
  166. return 0;
  167. }
  168. while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
  169. if (memcmp(cpuinfo_line, "ASEs implemented", 16) == 0) {
  170. char* p = strstr(cpuinfo_line, ase);
  171. if (p) {
  172. fclose(f);
  173. if (strcmp(ase, " msa") == 0) {
  174. return kCpuHasMSA;
  175. }
  176. return 0;
  177. }
  178. }
  179. }
  180. fclose(f);
  181. return 0;
  182. }
  183. static SAFEBUFFERS int GetCpuFlags(void) {
  184. int cpu_info = 0;
  185. #if !defined(__pnacl__) && !defined(__CLR_VER) && \
  186. (defined(__x86_64__) || defined(_M_X64) || defined(__i386__) || \
  187. defined(_M_IX86))
  188. int cpu_info0[4] = {0, 0, 0, 0};
  189. int cpu_info1[4] = {0, 0, 0, 0};
  190. int cpu_info7[4] = {0, 0, 0, 0};
  191. CpuId(0, 0, cpu_info0);
  192. CpuId(1, 0, cpu_info1);
  193. if (cpu_info0[0] >= 7) {
  194. CpuId(7, 0, cpu_info7);
  195. }
  196. cpu_info = kCpuHasX86 | ((cpu_info1[3] & 0x04000000) ? kCpuHasSSE2 : 0) |
  197. ((cpu_info1[2] & 0x00000200) ? kCpuHasSSSE3 : 0) |
  198. ((cpu_info1[2] & 0x00080000) ? kCpuHasSSE41 : 0) |
  199. ((cpu_info1[2] & 0x00100000) ? kCpuHasSSE42 : 0) |
  200. ((cpu_info7[1] & 0x00000200) ? kCpuHasERMS : 0);
  201. // AVX requires OS saves YMM registers.
  202. if (((cpu_info1[2] & 0x1c000000) == 0x1c000000) && // AVX and OSXSave
  203. ((GetXCR0() & 6) == 6)) { // Test OS saves YMM registers
  204. cpu_info |= kCpuHasAVX | ((cpu_info7[1] & 0x00000020) ? kCpuHasAVX2 : 0) |
  205. ((cpu_info1[2] & 0x00001000) ? kCpuHasFMA3 : 0) |
  206. ((cpu_info1[2] & 0x20000000) ? kCpuHasF16C : 0);
  207. // Detect AVX512bw
  208. if ((GetXCR0() & 0xe0) == 0xe0) {
  209. cpu_info |= (cpu_info7[1] & 0x40000000) ? kCpuHasAVX512BW : 0;
  210. cpu_info |= (cpu_info7[1] & 0x80000000) ? kCpuHasAVX512VL : 0;
  211. cpu_info |= (cpu_info7[2] & 0x00000002) ? kCpuHasAVX512VBMI : 0;
  212. cpu_info |= (cpu_info7[2] & 0x00000040) ? kCpuHasAVX512VBMI2 : 0;
  213. cpu_info |= (cpu_info7[2] & 0x00001000) ? kCpuHasAVX512VBITALG : 0;
  214. cpu_info |= (cpu_info7[2] & 0x00004000) ? kCpuHasAVX512VPOPCNTDQ : 0;
  215. cpu_info |= (cpu_info7[2] & 0x00000100) ? kCpuHasGFNI : 0;
  216. }
  217. }
  218. #endif
  219. #if defined(__mips__) && defined(__linux__)
  220. #if defined(__mips_msa)
  221. cpu_info = MipsCpuCaps("/proc/cpuinfo", " msa");
  222. #endif
  223. cpu_info |= kCpuHasMIPS;
  224. #endif
  225. #if defined(__arm__) || defined(__aarch64__)
  226. // gcc -mfpu=neon defines __ARM_NEON__
  227. // __ARM_NEON__ generates code that requires Neon. NaCL also requires Neon.
  228. // For Linux, /proc/cpuinfo can be tested but without that assume Neon.
  229. #if defined(__ARM_NEON__) || defined(__native_client__) || !defined(__linux__)
  230. cpu_info = kCpuHasNEON;
  231. // For aarch64(arm64), /proc/cpuinfo's feature is not complete, e.g. no neon
  232. // flag in it.
  233. // So for aarch64, neon enabling is hard coded here.
  234. #endif
  235. #if defined(__aarch64__)
  236. cpu_info = kCpuHasNEON;
  237. #else
  238. // Linux arm parse text file for neon detect.
  239. cpu_info = ArmCpuCaps("/proc/cpuinfo");
  240. #endif
  241. cpu_info |= kCpuHasARM;
  242. #endif // __arm__
  243. cpu_info |= kCpuInitialized;
  244. return cpu_info;
  245. }
  246. // Note that use of this function is not thread safe.
  247. LIBYUV_API
  248. int MaskCpuFlags(int enable_flags) {
  249. int cpu_info = GetCpuFlags() & enable_flags;
  250. SetCpuFlags(cpu_info);
  251. return cpu_info;
  252. }
  253. LIBYUV_API
  254. int InitCpuFlags(void) {
  255. return MaskCpuFlags(-1);
  256. }
  257. #ifdef __cplusplus
  258. } // extern "C"
  259. } // namespace libyuv
  260. #endif