thumb.pm 2.9 KB

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  1. #!/usr/bin/env perl
  2. ##
  3. ## Copyright (c) 2013 The WebM project authors. All Rights Reserved.
  4. ##
  5. ## Use of this source code is governed by a BSD-style license
  6. ## that can be found in the LICENSE file in the root of the source
  7. ## tree. An additional intellectual property rights grant can be found
  8. ## in the file PATENTS. All contributing project authors may
  9. ## be found in the AUTHORS file in the root of the source tree.
  10. ##
  11. package thumb;
  12. sub FixThumbInstructions($$)
  13. {
  14. my $short_branches = $_[1];
  15. my $branch_shift_offset = $short_branches ? 1 : 0;
  16. # Write additions with shifts, such as "add r10, r11, lsl #8",
  17. # in three operand form, "add r10, r10, r11, lsl #8".
  18. s/(add\s+)(r\d+),\s*(r\d+),\s*(lsl #\d+)/$1$2, $2, $3, $4/g;
  19. # Convert additions with a non-constant shift into a sequence
  20. # with left shift, addition and a right shift (to restore the
  21. # register to the original value). Currently the right shift
  22. # isn't necessary in the code base since the values in these
  23. # registers aren't used, but doing the shift for consistency.
  24. # This converts instructions such as "add r12, r12, r5, lsl r4"
  25. # into the sequence "lsl r5, r4", "add r12, r12, r5", "lsr r5, r4".
  26. s/^(\s*)(add)(\s+)(r\d+),\s*(r\d+),\s*(r\d+),\s*lsl (r\d+)/$1lsl$3$6, $7\n$1$2$3$4, $5, $6\n$1lsr$3$6, $7/g;
  27. # Convert loads with right shifts in the indexing into a
  28. # sequence of an add, load and sub. This converts
  29. # "ldrb r4, [r9, lr, asr #1]" into "add r9, r9, lr, asr #1",
  30. # "ldrb r9, [r9]", "sub r9, r9, lr, asr #1".
  31. s/^(\s*)(ldrb)(\s+)(r\d+),\s*\[(\w+),\s*(\w+),\s*(asr #\d+)\]/$1add $3$5, $5, $6, $7\n$1$2$3$4, [$5]\n$1sub $3$5, $5, $6, $7/g;
  32. # Convert register indexing with writeback into a separate add
  33. # instruction. This converts "ldrb r12, [r1, r2]!" into
  34. # "ldrb r12, [r1, r2]", "add r1, r1, r2".
  35. s/^(\s*)(ldrb)(\s+)(r\d+),\s*\[(\w+),\s*(\w+)\]!/$1$2$3$4, [$5, $6]\n$1add $3$5, $6/g;
  36. # Convert negative register indexing into separate sub/add instructions.
  37. # This converts "ldrne r4, [src, -pstep, lsl #1]" into
  38. # "subne src, src, pstep, lsl #1", "ldrne r4, [src]",
  39. # "addne src, src, pstep, lsl #1". In a couple of cases where
  40. # this is used, it's used for two subsequent load instructions,
  41. # where a hand-written version of it could merge two subsequent
  42. # add and sub instructions.
  43. s/^(\s*)((ldr|str|pld)(ne)?)(\s+)(r\d+,\s*)?\[(\w+), -([^\]]+)\]/$1sub$4$5$7, $7, $8\n$1$2$5$6\[$7\]\n$1add$4$5$7, $7, $8/g;
  44. # Convert register post indexing to a separate add instruction.
  45. # This converts "ldrneb r9, [r0], r2" into "ldrneb r9, [r0]",
  46. # "addne r0, r0, r2".
  47. s/^(\s*)((ldr|str)(ne)?[bhd]?)(\s+)(\w+),(\s*\w+,)?\s*\[(\w+)\],\s*(\w+)/$1$2$5$6,$7 [$8]\n$1add$4$5$8, $8, $9/g;
  48. # Convert "mov pc, lr" into "bx lr", since the former only works
  49. # for switching from arm to thumb (and only in armv7), but not
  50. # from thumb to arm.
  51. s/mov(\s*)pc\s*,\s*lr/bx$1lr/g;
  52. }
  53. 1;